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* Add makefile target for uploading "raw UART" imagesJulian Blake Kongslie2022-05-291-1/+19
* More planning.Julian Blake Kongslie2022-05-221-0/+1
* Update PLAN.Julian Blake Kongslie2022-05-221-6/+5
* Two-cycle memory arbiter, enabling 16 PDP-8s @ 50MHz.Julian Blake Kongslie2022-05-222-14/+12
* Only sample RS232 signals once per clock; use a delayed flop internally.Julian Blake Kongslie2022-05-221-9/+19
* Update plan.Julian Blake Kongslie2022-05-151-10/+6
* Significantly wider line size for data downloads.Julian Blake Kongslie2022-05-151-1/+1
* Fix the RS232 receive state machine 😠💢:mad:Julian Blake Kongslie2022-05-151-1/+1
* Change to 1Mbaud RS232Julian Blake Kongslie2022-05-152-2/+2
* Only phase shift the RS232 tx clock when we are between bytes.Julian Blake Kongslie2022-05-152-1/+22
* Consistent RS232 wire names (DCE side names is used everywhere)Julian Blake Kongslie2022-05-153-39/+39
* Change makefile to unconditionally load memory for 16 PDP-8sJulian Blake Kongslie2022-05-151-14/+14
* Remove extraneous newline (we still have some other one somewhere)Julian Blake Kongslie2022-05-081-1/+1
* Make the calculation for OVERSAMPLE more explicit.Julian Blake Kongslie2022-05-081-1/+1
* Demand that CTS is asserted for multiple symbol periods before transmit.Julian Blake Kongslie2022-05-081-1/+8
* *Proper* serial port for memory downloads. 115200 8O2 RS232 with CRTRTS.Julian Blake Kongslie2022-05-0811-132/+322
* Make the script for setting up the TTY actually connect.Julian Blake Kongslie2022-04-241-0/+6
* Add a quick and dirty script to set expected RS232 terminal settings.Julian Blake Kongslie2022-04-221-0/+23
* Oversample RS232 RX uart.Julian Blake Kongslie2022-04-222-42/+77
* Asynchronous reset on RS232 uart.Julian Blake Kongslie2022-04-221-2/+2
* Transmit and receive an even parity bit in RS232 uart.Julian Blake Kongslie2022-04-221-0/+23
* Transmit two stop bits to RS232 uart.Julian Blake Kongslie2022-04-221-2/+8
* Refer to wrap bits instead of previous greycode in FIFO greycode calculation.Julian Blake Kongslie2022-04-171-2/+2
* Fix whitespace/maxlinesize handling in p8bin2uart.Julian Blake Kongslie2022-04-171-8/+7
* Working (but very slow) RS232 UARTJulian Blake Kongslie2022-04-175-35/+165
* Integrate wrap bits into grey code for FIFO.Julian Blake Kongslie2022-03-281-5/+8
* Update PLAN.Julian Blake Kongslie2022-03-271-13/+10
* 12 PDP-8s! :-)Julian Blake Kongslie2022-03-271-1/+1
* A more-fair memory arbiter that actually works.Julian Blake Kongslie2022-03-271-31/+34
* Add RX/TX/RTS/CTS pin assignments for future RS232 work.Julian Blake Kongslie2022-03-271-0/+5
* Use the DF and IF switches as a selector for which PDP-8 owns the panel.Julian Blake Kongslie2022-03-271-89/+92
* Add a clock output pin for debugging the PLL.Julian Blake Kongslie2022-03-272-0/+5
* Attempt to make somewhat less error-prone downloads.Julian Blake Kongslie2022-03-272-6/+5
* Reduce internal clock speed to 30MHz.Julian Blake Kongslie2022-03-272-3/+3
* Attempt to download for 16 PDP-8s.Julian Blake Kongslie2022-03-271-8/+16
* Don't use SystemVerilog parametric types because Altera doesn't support them.Julian Blake Kongslie2022-03-271-9/+9
* First pass at RS232 tx/rx modules.Julian Blake Kongslie2022-03-271-0/+131
* Add basic clock-domain-crossing FIFO.Julian Blake Kongslie2022-03-261-0/+68
* Run ~*EIGHT GODDAMN PDP-8s IN PARALLEL*~Julian Blake Kongslie2022-03-203-48/+127
* Cleanup of PDP-8 core to support arbitrated memory protocol.Julian Blake Kongslie2022-03-201-190/+109
* Support loading RIMs and multi-word lines via the UART loader.Julian Blake Kongslie2022-03-202-12/+24
* Add a few useful memory images.Julian Blake Kongslie2022-03-205-4141/+0
* Temporary change to PDP-8 internal memory to match controller protocolJulian Blake Kongslie2022-03-201-57/+86
* Clean up p8bin2uart and support dumping multiple words per line.Julian Blake Kongslie2022-03-181-27/+73
* Redraw the diagram in PLAN to make it a little prettier.Julian Blake Kongslie2022-03-181-23/+46
* Minor paranoia about ensuring that we're in the correct half_stateJulian Blake Kongslie2022-03-181-0/+1
* Ignore colons on inputs; use them to separate words in output.Julian Blake Kongslie2022-03-182-7/+19
* Trivial change to make it a little easier to understand the mem arbiter.Julian Blake Kongslie2022-03-181-1/+1
* Add a few notes.Julian Blake Kongslie2022-03-131-0/+12
* Import p8bin2* tools into repo.Julian Blake Kongslie2022-03-132-0/+334
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