noncpu - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Collapse)	Author	Age	Files	Lines
*	Working focal!	Julian Blake Kongslie	2022-01-30	1	-5/+16
\| \| \| \| \| \| \|	It turns out that indirect jumps don't preincrement. The interpreter is almost unreadable at this point due to debugging messages. Sorry.
*	Switch back to $past-based scheduling; my clever idea wasn't clever enough.	Julian Blake Kongslie	2021-04-07	1	-22/+15
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*	Change our simulator timing model to use continuous assignment guards.	Julian Blake Kongslie	2021-04-05	1	-18/+25
\| \| \| \| \| \| \|	Instead of depending on verilator getting $past right, this (ab-)uses the SystemVerilog scheduling model which allows us to get a consistent view of the universe by "isolating" the blocking updates. Easier to code to and seems to be more reliable in verilator.
*	Convert to using $sampled instead of $past, for more uniformity.	Julian Blake Kongslie	2021-03-29	1	-4/+0
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*	Pessimize JTAG UART somewhat.	Julian Blake Kongslie	2021-03-28	1	-0/+4
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*	Initial commit.	Julian Blake Kongslie	2021-03-28	1	-0/+84