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authorJulian Blake Kongslie2021-03-24 08:35:07 -0700
committerJulian Blake Kongslie2021-03-24 08:50:57 -0700
commit5c1df6d27f5dac143efc9ce84689b863dbee45bd (patch)
tree9bb9c9bcab00e7d5a5d1b40467d8e5a810f0b706 /sim
parentClean before building. (diff)
downloadtoycpu-5c1df6d27f5dac143efc9ce84689b863dbee45bd.tar.xz
Reorganize repo layout to make it a little easier to work within.
Diffstat (limited to 'sim')
-rw-r--r--sim/main.cpp56
1 files changed, 56 insertions, 0 deletions
diff --git a/sim/main.cpp b/sim/main.cpp
new file mode 100644
index 0000000..3f49cb6
--- /dev/null
+++ b/sim/main.cpp
@@ -0,0 +1,56 @@
1#include <cstdint>
2#include <iostream>
3#include <verilated.h>
4#include <verilated_vcd_c.h>
5
6#include "Vtop.h"
7
8int main(int argc, const char *argv[])
9{
10 Verilated::commandArgs(argc, argv);
11
12 Verilated::traceEverOn(true);
13 VerilatedVcdC vcd;
14
15 Vtop top;
16 top.trace(&vcd, 100 /* levels of hierarchy */);
17
18 vcd.set_time_unit("ns");
19 vcd.set_time_resolution("ns");
20 vcd.open("build/out.vcd");
21
22 std::cout << "*** RESET SEQUENCE ***\n";
23
24 std::uint64_t time = 0;
25
26 top.clk = 0;
27 top.reset_n = 0;
28 top.eval();
29 vcd.dump(++time);
30
31 top.clk = 1;
32 top.eval();
33 vcd.dump(++time);
34
35 top.clk = 0;
36 top.reset_n = 1;
37 top.eval();
38 vcd.dump(++time);
39
40 std::cout << "*** MAIN LOOP ***\n";
41
42 for (unsigned int i = 0; i < 500 && !Verilated::gotFinish(); ++i) {
43 top.clk = 1;
44 top.eval();
45 vcd.dump(++time);
46 top.clk = 0;
47 top.eval();
48 vcd.dump(++time);
49 }
50
51 std::cout << "\n";
52
53 vcd.close();
54
55 return 0;
56}