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-rw-r--r--hdl/panel.sv184
-rw-r--r--hdl/top.sv56
2 files changed, 240 insertions, 0 deletions
diff --git a/hdl/panel.sv b/hdl/panel.sv
new file mode 100644
index 0000000..fc1f718
--- /dev/null
+++ b/hdl/panel.sv
@@ -0,0 +1,184 @@
1`include "util.svh"
2
3module panel
4 ( input bit clk
5 , input bit reset
6
7 , input bit [8:1][12:1] led
8 , output bit [3:1][12:1] switch
9
10 , inout wire [10:1] gpioa
11 , inout wire [28:13] gpiob
12 , inout wire [40:31] gpioc
13 );
14
15enum
16 { LED_ROW1
17 , LED_ROW2
18 , LED_ROW3
19 , LED_ROW4
20 , LED_ROW5
21 , LED_ROW6
22 , LED_ROW7
23 , LED_ROW8
24 , SWITCH_PREP
25 , SWITCH_ROW1
26 , SWITCH_ROW2
27 , SWITCH_ROW3
28 } state;
29
30`define LEDROW1 gpioc[38]
31`define LEDROW2 gpioc[40]
32`define LEDROW3 gpiob[15]
33`define LEDROW4 gpiob[16]
34`define LEDROW5 gpiob[18]
35`define LEDROW6 gpiob[22]
36`define LEDROW7 gpioc[37]
37`define LEDROW8 gpiob[13]
38
39`define SWROW1 gpioc[36]
40`define SWROW2 gpioa[1]
41`define SWROW3 gpioa[2]
42
43`define COL1 gpioa[8]
44`define COL2 gpioa[10]
45`define COL3 gpioa[7]
46`define COL4 gpiob[27]
47`define COL5 gpioc[31]
48`define COL6 gpiob[26]
49`define COL7 gpiob[24]
50`define COL8 gpiob[21]
51`define COL9 gpiob[19]
52`define COL10 gpiob[23]
53`define COL11 gpioc[32]
54`define COL12 gpioc[33]
55
56`define DO_LEDS
57`define DO_SWITCHES
58
59always_ff @(posedge clk) begin
60 // LED rows (active high)
61 `LEDROW1 = 1'b0;
62 `LEDROW2 = 1'b0;
63 `LEDROW3 = 1'b0;
64 `LEDROW4 = 1'b0;
65 `LEDROW5 = 1'b0;
66 `LEDROW6 = 1'b0;
67 `LEDROW7 = 1'b0;
68 `LEDROW8 = 1'b0;
69
70 // Switch rows (active low)
71 `SWROW1 = 1'b1;
72 `SWROW2 = 1'b1;
73 `SWROW3 = 1'b1;
74
75 if (reset) begin
76 switch = 0;
77 state = state.first;
78 end else begin
79 case (state)
80`ifdef DO_LEDS
81`define LED_ROW(n) \
82 LED_ROW``n: begin \
83 `LEDROW``n = 1'b1; \
84 `COL1 = ~led[n][1]; \
85 `COL2 = ~led[n][2]; \
86 `COL3 = ~led[n][3]; \
87 `COL4 = ~led[n][4]; \
88 `COL5 = ~led[n][5]; \
89 `COL6 = ~led[n][6]; \
90 `COL7 = ~led[n][7]; \
91 `COL8 = ~led[n][8]; \
92 `COL9 = ~led[n][9]; \
93 `COL10 = ~led[n][10]; \
94 `COL11 = ~led[n][11]; \
95 `COL12 = ~led[n][12]; \
96 end
97
98 `LED_ROW(1)
99 `LED_ROW(2)
100 `LED_ROW(3)
101 `LED_ROW(4)
102 `LED_ROW(5)
103 `LED_ROW(6)
104 `LED_ROW(7)
105 `LED_ROW(8)
106`endif
107
108`ifdef DO_SWITCHES
109 SWITCH_PREP: begin
110 `SWROW1 = 1'b0;
111
112 `COL1 = 1'bZ;
113 `COL2 = 1'bZ;
114 `COL3 = 1'bZ;
115 `COL4 = 1'bZ;
116 `COL5 = 1'bZ;
117 `COL6 = 1'bZ;
118 `COL7 = 1'bZ;
119 `COL8 = 1'bZ;
120 `COL9 = 1'bZ;
121 `COL10 = 1'bZ;
122 `COL11 = 1'bZ;
123 `COL12 = 1'bZ;
124 end
125
126 SWITCH_ROW1: begin
127 `SWROW2 = 1'b0;
128
129 switch[1][1] = ~`COL1;
130 switch[1][2] = ~`COL2;
131 switch[1][3] = ~`COL3;
132 switch[1][4] = ~`COL4;
133 switch[1][5] = ~`COL5;
134 switch[1][6] = ~`COL6;
135 switch[1][7] = ~`COL7;
136 switch[1][8] = ~`COL8;
137 switch[1][9] = ~`COL9;
138 switch[1][10] = ~`COL10;
139 switch[1][11] = ~`COL11;
140 switch[1][12] = ~`COL12;
141 end
142
143 SWITCH_ROW2: begin
144 `SWROW3 = 1'b0;
145
146 switch[2][1] = ~`COL1;
147 switch[2][2] = ~`COL2;
148 switch[2][3] = ~`COL3;
149 switch[2][4] = ~`COL4;
150 switch[2][5] = ~`COL5;
151 switch[2][6] = ~`COL6;
152 switch[2][7] = ~`COL7;
153 switch[2][8] = ~`COL8;
154 switch[2][9] = ~`COL9;
155 switch[2][10] = ~`COL10;
156 switch[2][11] = ~`COL11;
157 switch[2][12] = ~`COL12;
158 end
159
160 SWITCH_ROW3: begin
161 switch[3][1] = ~`COL1;
162 switch[3][2] = ~`COL2;
163 switch[3][3] = ~`COL3;
164 switch[3][4] = ~`COL4;
165 switch[3][5] = ~`COL5;
166 switch[3][6] = ~`COL6;
167 switch[3][7] = ~`COL7;
168 switch[3][8] = ~`COL8;
169 switch[3][9] = ~`COL9;
170 switch[3][10] = ~`COL10;
171 switch[3][11] = ~`COL11;
172 switch[3][12] = ~`COL12;
173 end
174`endif
175 endcase
176
177 if (state == state.last)
178 state = state.first;
179 else
180 state = state.next;
181 end
182end
183
184endmodule
diff --git a/hdl/top.sv b/hdl/top.sv
index 1d77216..abd6f30 100644
--- a/hdl/top.sv
+++ b/hdl/top.sv
@@ -3,6 +3,10 @@
3module top 3module top
4 ( input bit native_clk // verilator public 4 ( input bit native_clk // verilator public
5 , input bit reset_n // verilator public 5 , input bit reset_n // verilator public
6
7 , inout wire [10:1] gpioa
8 , inout wire [28:13] gpiob
9 , inout wire [40:31] gpioc
6 ); 10 );
7 11
8bit clk; 12bit clk;
@@ -18,9 +22,61 @@ clock
18 , .reset(reset) 22 , .reset(reset)
19 ); 23 );
20 24
25bit slowclk;
26bit slowreset;
27clock
28 #( .MULTIPLY_BY(1)
29 , .DIVIDE_BY(5000)
30 ) slowpll
31 ( .native_clk(native_clk)
32 , .reset_n(reset_n)
33 , .target_clk(slowclk)
34 , .reset(slowreset)
35 );
36
37bit [8:1][12:1] led;
38bit [3:1][12:1] switch;
39
40panel fp
41 ( .clk(slowclk)
42 , .reset(slowreset)
43
44 , .led(led)
45 , .switch(switch)
46
47 , .gpioa(gpioa)
48 , .gpiob(gpiob)
49 , .gpioc(gpioc)
50 );
51
52assign led[1] = switch[1];
53assign led[2] = switch[2];
54assign led[3] = switch[3];
55assign led[4] = 0;
56assign led[5] = 0;
57assign led[6] = 0;
58assign led[7] = 0;
59assign led[8] = 0;
60
61/*
62wire [7:0] debugchar;
63assign debugchar = "0" + {switch[1][1], switch[1][2], switch[3][1]};
64
65jtag_uart debug
66 ( .clk(slowclk)
67 , .reset(slowreset)
68
69 , .rx_ready(0)
70 , .tx_valid(1)
71 , .tx_data(debugchar)
72 );
73*/
74
75/*
21core cpu 76core cpu
22 ( .clk(clk) 77 ( .clk(clk)
23 , .reset(reset) 78 , .reset(reset)
24 ); 79 );
80*/
25 81
26endmodule 82endmodule
generated by cgit v1.2.3 (git 2.51.0) at 2026-04-18 18:56:15 -0700